This invention relates to a frequency lock loop circuit employing a gated frequency difference detector.
It has been found that the well-known phase lock loop circuit requires a limiter to maintain the loop gain constant. The phase detector output is the product of both the input amplitude and the sine of the phase angle. The above-mentioned limiter maintains the input amplitude constant for varying input RF levels and in this way keeps the loop gain constant. This limiter is usually very costly and physically very large.
A system which avoids the use of the above mentioned limiter is described in the above identified related U.S. Pat. No. 3,863,156. This apparatus requires the use of four detection levels, a positive and negative level for each of a pair of quadrature video signals. This apparatus suffers from the disadvantages that the thresholds must be near the zero crossings of the sine wave in order to develop the decoded outputs to operate the phase detector. Further, the thresholds must have a value greater than the peak noise value to prevent false triggering.